JLink info:
------------
DLL: V7.50 , compiled Jul 1 2021 17:37:28
Firmware: J-Link V9 compiled May 7 2021 16:26:12
Hardware: V9.60
S/N : 69667985
Feature(s) : RDI, GDB, FlashDL, FlashBP, JFlash
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: Scanning AP map to find all available APs
* JLink Info: AP[1]: Stopped AP scan as end of AP map has been reached
* JLink Info: AP[0]: AHB-AP (IDR: 0x24770011)
* JLink Info: Iterating through AP map to find AHB-AP to use
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots
* JLink Info: CoreSight components:
* JLink Info: ROMTbl[0] @ E00FF000
* JLink Info: ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
* JLink Info: ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
* JLink Info: ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
* JLink Info: ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
* JLink Info: ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
ROMTableAddr = 0xE00FF000
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
* JLink Info: Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
* JLink Info: Reset: Using fallback: Reset pin.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
* JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
* JLink Info: Reset: Reconnecting and manually halting CPU.
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: AP map detection skipped. Manually configured AP map found.
* JLink Info: AP[0]: AHB-AP (IDR: Not set)
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: CPU could not be halted
* JLink Info: Reset: Core did not halt after reset, trying to disable WDT.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
* JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
* JLink Info: Reset: Reconnecting and manually halting CPU.
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: AP map detection skipped. Manually configured AP map found.
* JLink Info: AP[0]: AHB-AP (IDR: Not set)
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: CPU could not be halted
* JLink Info: Reset: Failed. Toggling reset pin and trying reset strategy again.
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: AP map detection skipped. Manually configured AP map found.
* JLink Info: AP[0]: AHB-AP (IDR: Not set)
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
* JLink Info: Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
* JLink Info: Reset: Using fallback: Reset pin.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
* JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
* JLink Info: Reset: Reconnecting and manually halting CPU.
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: AP map detection skipped. Manually configured AP map found.
* JLink Info: AP[0]: AHB-AP (IDR: Not set)
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: CPU could not be halted
* JLink Info: Reset: Core did not halt after reset, trying to disable WDT.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
* JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
* JLink Info: Reset: Reconnecting and manually halting CPU.
* JLink Info: Found SW-DP with ID 0x2BA01477
* JLink Info: DPIDR: 0x2BA01477
* JLink Info: AP map detection skipped. Manually configured AP map found.
* JLink Info: AP[0]: AHB-AP (IDR: Not set)
* JLink Info: AP[0]: Core found
* JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
* JLink Info: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: CPU could not be halted
* JLink Info: CPU could not be halted
***JLink Error: Failed to halt CPU.
* JLink Info: CPU could not be halted
Error: Flash Download failed - Target DLL has been cancelled
Flash Load finished at 09:01:53
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